114-117 Intellgent Chip and Design Allance

Application of Generative Adversarial Networks in RF Circuit Design

RISC-V Curriculum Development Project

Advanced Memory Hierarchy and Cache Optimization

The teaching module Advanced Memory Hierarchy and Cache..

114-117 Intellgent Chip and Design Allance

RISC-V Architecture for IoT Systems with FPGA Implementation

本模組藉由系統晶片開發平台結合深度學習技術之實作，啟發學生思考和動手實..

114-117 Intellgent Chip and Design Allance

Photonic Integrated Circuits for Optical Computing [Fundamentals]

RISC-V Curriculum Development Project

Multi-core RISC-V Cache Coherence Introduction and Implementation (improvement)

114-117 Intellgent Chip and Design Allance

IoT Platform Digital Hardware Accelerator IP Integration Technology and Practice

114-117 Intellgent Chip and Design Allance

Heterogeneous Integration and System in Package

Moe Talent Cultivation Project for Advanced IC Design

Custom layout synthesis based on FinFETs

Moe Talent Cultivation Project for Advanced IC Design

3D FinFET Cell-based Digital Design